About the Company:
Website: www.aesterindia.com
Job location: Kochi
Desired Experience: 0-1 years
Target Batch Passout: 2016-2017
Salary: INR 0.8 LPA - INR 1.2 LPA
(The final CTC will depend upon candidate’s performance in the interview and will be at the company’s discretion)
Course Specialization: Any Graduate
Tentative date of interview: Will be communicated post registration window is closed.
* The shortlisted candidates will be sent Admit Cards/Call Letters on their registered mail Id, which they will need to, carry on the date of Interview. No candidate will be entertained by the company without the formal intimation from Aspiring Minds.
Job Description & Skill Set Required:
- Combinational and Sequential Logic Design for PLDs and ASICs, with an emphasis on synchronous design techniques.
- How to design and implement fundamental structures e.g. decoders, multiplexers, shift registers, counters etc...
- How to design and implement synchronous Finite State Machines
- An overview of ASIC and field programmable logic design including a survey of state of the art devices
- Designing with programmable devices.
- Effective Design methodologies and flows.
- Benefits Live exposure.
- Certification after successful completion of the project assignment/ internship.
Interview Process:
-Face To Face Interview
Last date to apply: 12 March 2018
Education:
B.Sc., B.Tech/B.E.
Work Experience:
0 - 1 Years
Salary
0.8 - 1.2 LPA
Industry
Electronics & Semiconductor